aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMatt Turner <mattst88@gentoo.org>2011-06-25 12:16:07 -0400
committerMatt Turner <mattst88@gmail.com>2011-06-25 12:16:07 -0400
commitbd0e09653358771df2ae9782ba9e757671f0c65c (patch)
treee48ab120fe684164c198d512c5ba14862013300c
parentmips.py: remove n32/n64 USE flags (diff)
downloadcatalyst-bd0e09653358771df2ae9782ba9e757671f0c65c.tar.gz
catalyst-bd0e09653358771df2ae9782ba9e757671f0c65c.tar.bz2
catalyst-bd0e09653358771df2ae9782ba9e757671f0c65c.zip
mips.py: add multilib (and missing n64) classes
-rw-r--r--ChangeLog3
-rw-r--r--modules/catalyst/arch/mips.py53
2 files changed, 56 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 6f98efd..30eb83a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,9 @@
# $Id$
25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+ modules/catalyst/arch/mips.py: add multilib (and missing n64) classes
+
+ 25 Jun 2011; Matt Turner <mattst88@gentoo.org>
modules/catalyst/arch/mips.py: remove n32/n64 USE flags
25 Jun 2011; Matt Turner <mattst88@gentoo.org>
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 51b6812..4c4af0c 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -29,6 +29,12 @@ class generic_mips64el(catalyst.arch.generic_arch):
self.settings["CHROOT"]="chroot"
self.settings["CHOST"]="mips64el-unknown-linux-gnu"
+class generic_multilib(catalyst.arch.generic_arch):
+ "Abstract base class for MIPS multilib"
+ def __init__(self,myspec):
+ catalyst.arch.generic_arch.__init__(self,myspec)
+ self.settings["HOSTUSE"]=["multilib"]
+
class arch_mips1(generic_mips):
"Builder class for MIPS I [Big-endian]"
def __init__(self,myspec):
@@ -53,6 +59,13 @@ class arch_mips3_n64(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+class arch_mips3_multilib(generic_mips64,generic_multilib):
+ "Builder class for MIPS III [Big-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ generic_multilib.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+
class arch_mips4(generic_mips64):
"Builder class for MIPS IV [Big-endian]"
def __init__(self,myspec):
@@ -71,6 +84,13 @@ class arch_mips4_n64(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+class arch_mips4_multilib(generic_mips64,generic_multilib):
+ "Builder class for MIPS IV [Big-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ generic_multilib.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+
class arch_mipsel1(generic_mipsel):
"Builder class for all MIPS I [Little-endian]"
def __init__(self,myspec):
@@ -89,6 +109,19 @@ class arch_mipsel3_n32(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+class arch_mipsel3_n64(generic_mips64el):
+ "Builder class for MIPS III [Little-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+
+class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
+ "Builder class for MIPS III [Little-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ generic_multilib.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+
class arch_loongson2e(generic_mipsel):
"Builder class for all Loongson 2E [Little-endian]"
def __init__(self,myspec):
@@ -125,6 +158,19 @@ class arch_mipsel4_n32(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
+class arch_mipsel4_n64(generic_mips64el):
+ "Builder class for MIPS IV [Little-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+
+class arch_mipsel4_multilib(generic_mips64el,generic_multilib):
+ "Builder class for MIPS IV [Little-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ generic_multilib.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+
class arch_cobalt(generic_mipsel):
"Builder class for all cobalt [Little-endian]"
def __init__(self,myspec):
@@ -147,14 +193,21 @@ _subarch_map = {
"mips3" : arch_mips3,
"mips3_n32" : arch_mips3_n32,
"mips3_n64" : arch_mips3_n64,
+ "mips3_multilib": arch_mips3_multilib,
"mips4" : arch_mips4,
"mips4_n32" : arch_mips4_n32,
+ "mips4_n64" : arch_mips4_n64,
+ "mips4_multilib": arch_mips4_multilib,
"mipsel" : arch_mipsel1,
"mipsel1" : arch_mipsel1,
"mipsel3" : arch_mipsel3,
"mipsel3_n32" : arch_mipsel3_n32,
+ "mipsel3_n64" : arch_mipsel3_n64,
+ "mipsel3_multilib" : arch_mipsel3_multilib,
"mipsel4" : arch_mipsel4,
"mipsel4_n32" : arch_mipsel4_n32,
+ "mipsel4_n64" : arch_mipsel4_n64,
+ "mipsel4_multilib" : arch_mipsel4_multilib,
"loongson2e" : arch_loongson2e,
"loongson2e_n32" : arch_loongson2e_n32,
"loongson2f" : arch_loongson2f,