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author陳韋任 (Wei-Ren Chen) <chenwj@iis.sinica.edu.tw>2012-11-14 10:49:55 +0800
committerDoug Goldstein <cardoe@cardoe.com>2012-11-21 15:31:00 -0600
commit91ef50cf03763fbc9ce0a4412b99b72d2a141220 (patch)
tree67b8c55cde11edf71ffc642ae862be62c214f87a
parentmips/malta: fix CBUS UART interrupt pin (diff)
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target-mips: fix wrong microMIPS opcode encodingqemu-kvm-1.1.2-gentoo
While reading microMIPS decoding, I found a possible wrong opcode encoding. According to [1] page 166, the bits 13..12 for MULTU is 0x01 rather than 0x00. Please review, thanks. [1] MIPS Architecture for Programmers VolumeIV-e: The MIPS DSP Application-Specific Extension to the microMIPS32 Architecture Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> (cherry picked from commit 6801038bc52d61f81ac8a25fbe392f1bad982887)
-rw-r--r--target-mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8ff1fabc4..6932c285c 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -9463,7 +9463,7 @@ enum {
/* bits 13..12 for 0x32 */
MULT_ACC = 0x0,
- MULTU_ACC = 0x0,
+ MULTU_ACC = 0x1,
/* bits 15..12 for 0x2c */
SEB = 0x2,