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| author |   Igor Kovalenko <igor.v.kovalenko@gmail.com> | 2009-07-12 12:35:31 +0400 |
|---|---|---|
| committer |   Blue Swirl <blauwirbel@gmail.com> | 2009-07-12 08:46:54 +0000 |
| commit | 5210977a8511fc0c4a8a1a68c01fa3b65e29edc0 (patch) | |
| tree | dd12f3bcc62297f325c30718c6d42764dff0afd6 /cpu-exec.c | |
| parent | Sparc32: convert eccmemctl to qdev (diff) | |
| download | qemu-kvm-5210977a8511fc0c4a8a1a68c01fa3b65e29edc0.tar.gz qemu-kvm-5210977a8511fc0c4a8a1a68c01fa3b65e29edc0.tar.bz2 qemu-kvm-5210977a8511fc0c4a8a1a68c01fa3b65e29edc0.zip | |
sparc64: trap handling corrections
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
> On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
>> Good trap handling is required to process interrupts.
>> This patch fixes the following:
>>
>> - sparc64 has no wim register
>> - sparc64 has no psret register, use IE bit of pstate
>> extract IE checking code to cpu_interrupts_enabled
>> - alternate globals are not available if cpu has GL feature
>> in this case bit AG of pstate is constant zero
>> - write to pstate must actually write pstate
>> even if cpu has GL feature
>>
>> Also timer interrupt is handled using do_interrupt.
>
> A bit too much for one patch. Please also remove the code instead of
> commenting out.
I now excluded timer interrupt related part.
To my mind other changes are essentially tied together.
> PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.
Fixed, please find attached the updated version.
--
Kind regards,
Igor V. Kovalenko
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index 38335f8b4..9baa9495c 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -475,7 +475,7 @@ int cpu_exec(CPUState *env1) } #elif defined(TARGET_SPARC) if ((interrupt_request & CPU_INTERRUPT_HARD) && - (env->psret != 0)) { + cpu_interrupts_enabled(env)) { int pil = env->interrupt_index & 15; int type = env->interrupt_index & 0xf0; @@ -486,7 +486,7 @@ int cpu_exec(CPUState *env1) env->exception_index = env->interrupt_index; do_interrupt(env); env->interrupt_index = 0; -#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) cpu_check_irqs(env); #endif next_tb = 0; |