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| author |   Michael S. Tsirkin <mst@redhat.com> | 2009-11-25 16:31:42 +0200 |
|---|---|---|
| committer |   Anthony Liguori <aliguori@us.ibm.com> | 2009-12-07 16:36:49 -0600 |
| commit | 0ea5709a32085f7d14901a09d12bd35f9b267607 (patch) | |
| tree | b61a1a140b0ca7bfc7b806410117f4166170bf01 /hw/pci.h | |
| parent | pci: interrupt status bit implementation (diff) | |
| download | qemu-kvm-0ea5709a32085f7d14901a09d12bd35f9b267607.tar.gz qemu-kvm-0ea5709a32085f7d14901a09d12bd35f9b267607.tar.bz2 qemu-kvm-0ea5709a32085f7d14901a09d12bd35f9b267607.zip | |
pci: interrupt disable bit support
Interrupt disable bit is mandatory in PCI spec.
Implement it to make devices spec compliant.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
(cherry picked from commit b6981cb57be5d66b1b7cf9009a122fb3cdd4b96b)
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -101,6 +101,7 @@ typedef struct PCIIORegion { #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ #define PCI_COMMAND_MASTER 0x4 /* Enable bus master */ +#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */ #define PCI_STATUS 0x06 /* 16 bits */ #define PCI_STATUS_INTERRUPT 0x08 #define PCI_REVISION_ID 0x08 /* 8 bits */ |