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| author |   Michael S. Tsirkin <mst@redhat.com> | 2009-11-25 15:44:40 +0200 |
|---|---|---|
| committer |   Anthony Liguori <aliguori@us.ibm.com> | 2009-12-07 16:36:48 -0600 |
| commit | 67a2698dacbabb40ec6ad1a9a9c839164170fedc (patch) | |
| tree | 3d6c0e7ce59f45d26bbe70e3e1b3ef8bb0f727fe /hw/pci.h | |
| parent | pci: prepare irq code for interrupt state (diff) | |
| download | qemu-kvm-67a2698dacbabb40ec6ad1a9a9c839164170fedc.tar.gz qemu-kvm-67a2698dacbabb40ec6ad1a9a9c839164170fedc.tar.bz2 qemu-kvm-67a2698dacbabb40ec6ad1a9a9c839164170fedc.zip | |
pci: interrupt status bit implementation
interrupt status is a mandatory feature in PCI spec,
so devices must implement it to be spec compliant.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
(cherry picked from commit f9bf77dd1f838b0061172fe41709b221956da2f5)
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -102,6 +102,7 @@ typedef struct PCIIORegion { #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ #define PCI_COMMAND_MASTER 0x4 /* Enable bus master */ #define PCI_STATUS 0x06 /* 16 bits */ +#define PCI_STATUS_INTERRUPT 0x08 #define PCI_REVISION_ID 0x08 /* 8 bits */ #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ #define PCI_CLASS_DEVICE 0x0a /* Device class */ |