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| author |   Michael S. Tsirkin <mst@redhat.com> | 2009-11-25 15:20:51 +0200 |
|---|---|---|
| committer |   Anthony Liguori <aliguori@us.ibm.com> | 2009-12-07 16:36:48 -0600 |
| commit | eea4acfa5c1ef26439a718375475fe468b7f2fba (patch) | |
| tree | 7166501981a7c1adaac0cee5e8561c1aabcd01a0 /hw/pci.h | |
| parent | msix: function mask support (diff) | |
| download | qemu-kvm-eea4acfa5c1ef26439a718375475fe468b7f2fba.tar.gz qemu-kvm-eea4acfa5c1ef26439a718375475fe468b7f2fba.tar.bz2 qemu-kvm-eea4acfa5c1ef26439a718375475fe468b7f2fba.zip | |
pci: prepare irq code for interrupt state
This rearranges code in preparation for interrupt state
implementation.
Changes:
- split up bus walk away from interrupt handling
into a subroutine
- change irq_state from an array to bitmask
- verify that irq_state values are 0 or 1 on load
There are no functional changes.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
(cherry picked from commit d036bb215e0ac1d1fd467239f1d3b7d904cac90a)
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -220,7 +220,7 @@ struct PCIDevice { qemu_irq *irq; /* Current IRQ levels. Used internally by the generic PCI code. */ - int irq_state[PCI_NUM_PINS]; + uint8_t irq_state; /* Capability bits */ uint32_t cap_present; |