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authorBlue Swirl <blauwirbel@gmail.com>2009-07-20 17:19:25 +0000
committerBlue Swirl <blauwirbel@gmail.com>2009-07-20 17:19:25 +0000
commit0bf9e31af1cc2915c9d250aab0ada0878df897ee (patch)
tree881f69538a0a506d2cbb41c7b0aa67bc8f4ea2bc /hw
parentFix build with DEBUG_PCI in pci_host.h enabled (diff)
downloadqemu-kvm-0bf9e31af1cc2915c9d250aab0ada0878df897ee.tar.gz
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Fix most warnings (errors with -Werror) when debugging is enabled
I used the following command to enable debugging: perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/* Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/cirrus_vga.c5
-rw-r--r--hw/i8259.c1
-rw-r--r--hw/openpic.c31
-rw-r--r--hw/ppc_prep.c3
-rw-r--r--hw/scsi-disk.c12
-rw-r--r--hw/slavio_timer.c8
-rw-r--r--hw/sun4c_intctl.c7
-rw-r--r--hw/usb-ohci.c4
-rw-r--r--hw/usb-uhci.c2
-rw-r--r--hw/vga.c12
10 files changed, 43 insertions, 42 deletions
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 902b3ee82..0460f9713 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -2029,7 +2029,7 @@ static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr)
} else {
val = 0xff;
#ifdef DEBUG_CIRRUS
- printf("cirrus: mem_readb %06x\n", addr);
+ printf("cirrus: mem_readb " TARGET_FMT_plx "\n", addr);
#endif
}
return val;
@@ -2124,7 +2124,8 @@ static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr,
}
} else {
#ifdef DEBUG_CIRRUS
- printf("cirrus: mem_writeb %06x value %02x\n", addr, mem_value);
+ printf("cirrus: mem_writeb " TARGET_FMT_plx " value %02x\n", addr,
+ mem_value);
#endif
}
}
diff --git a/hw/i8259.c b/hw/i8259.c
index adabd2b72..0b9fab5b4 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -25,6 +25,7 @@
#include "pc.h"
#include "isa.h"
#include "monitor.h"
+#include "qemu-timer.h"
/* debug PIC */
//#define DEBUG_PIC
diff --git a/hw/openpic.c b/hw/openpic.c
index baa7ecc28..f50031dd5 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -592,7 +592,7 @@ static void openpic_gbl_write (void *opaque, target_phys_addr_t addr, uint32_t v
IRQ_dst_t *dst;
int idx;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
#if defined TARGET_WORDS_BIGENDIAN
@@ -651,7 +651,7 @@ static uint32_t openpic_gbl_read (void *opaque, target_phys_addr_t addr)
openpic_t *opp = opaque;
uint32_t retval;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@@ -824,7 +824,7 @@ static void openpic_cpu_write (void *opaque, target_phys_addr_t addr, uint32_t v
IRQ_dst_t *dst;
int idx, s_IRQ, n_IRQ;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
#if defined TARGET_WORDS_BIGENDIAN
@@ -886,7 +886,7 @@ static uint32_t openpic_cpu_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx, n_IRQ;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@@ -1264,8 +1264,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
static void mpic_irq_raise(openpic_t *mpp, int n_CPU, IRQ_src_t *src)
{
int n_ci = IDR_CI0 - n_CPU;
- DPRINTF("%s: cpu:%d irq:%d (testbit idr:%x ci:%d)\n", __func__,
- n_CPU, n_IRQ, mpp->src[n_IRQ].ide, n_ci);
+
if(test_bit(&src->ide, n_ci)) {
qemu_irq_raise(mpp->dst[n_CPU].irqs[OPENPIC_OUTPUT_CINT]);
}
@@ -1313,7 +1312,7 @@ static void mpic_timer_write (void *opaque, target_phys_addr_t addr, uint32_t va
openpic_t *mpp = opaque;
int idx, cpu;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
addr &= 0xFFFF;
@@ -1347,7 +1346,7 @@ static uint32_t mpic_timer_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx, cpu;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@@ -1382,7 +1381,7 @@ static void mpic_src_ext_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_EXT_IRQ;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@@ -1405,7 +1404,7 @@ static uint32_t mpic_src_ext_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_EXT_IRQ;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@@ -1432,7 +1431,7 @@ static void mpic_src_int_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_INT_IRQ;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@@ -1455,7 +1454,7 @@ static uint32_t mpic_src_int_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_INT_IRQ;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@@ -1482,7 +1481,7 @@ static void mpic_src_msg_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_MSG_IRQ;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@@ -1505,7 +1504,7 @@ static uint32_t mpic_src_msg_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_MSG_IRQ;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@@ -1532,7 +1531,7 @@ static void mpic_src_msi_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_MSI_IRQ;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@@ -1554,7 +1553,7 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_MSI_IRQ;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 7181181be..7a219778c 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -60,7 +60,8 @@ do { \
} \
} while (0)
#elif defined (DEBUG_PPC_IO)
-#define PPC_IO_DPRINTF(fmt, ...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
+#define PPC_IO_DPRINTF(fmt, ...) \
+qemu_log_mask(CPU_LOG_IOPORT, fmt, ## __VA_ARGS__)
#else
#define PPC_IO_DPRINTF(fmt, ...) do { } while (0)
#endif
diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index a0485dbeb..8b6426fd8 100644
--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -172,7 +172,7 @@ static void scsi_read_complete(void * opaque, int ret)
scsi_command_complete(r, STATUS_CHECK_CONDITION, SENSE_NO_SENSE);
return;
}
- DPRINTF("Data ready tag=0x%x len=%d\n", r->tag, r->iov.iov_len);
+ DPRINTF("Data ready tag=0x%x len=%" PRId64 "\n", r->tag, r->iov.iov_len);
s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len);
}
@@ -192,7 +192,7 @@ static void scsi_read_data(SCSIDevice *d, uint32_t tag)
return;
}
if (r->sector_count == (uint32_t)-1) {
- DPRINTF("Read buf_len=%d\n", r->iov.iov_len);
+ DPRINTF("Read buf_len=%" PRId64 "\n", r->iov.iov_len);
r->sector_count = 0;
s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len);
return;
@@ -777,7 +777,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
case 0x08:
case 0x28:
case 0x88:
- DPRINTF("Read (sector %lld, count %d)\n", lba, len);
+ DPRINTF("Read (sector %" PRId64 ", count %d)\n", lba, len);
if (lba > s->max_lba)
goto illegal_lba;
r->sector = lba * s->cluster_size;
@@ -786,7 +786,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
case 0x0a:
case 0x2a:
case 0x8a:
- DPRINTF("Write (sector %lld, count %d)\n", lba, len);
+ DPRINTF("Write (sector %" PRId64 ", count %d)\n", lba, len);
if (lba > s->max_lba)
goto illegal_lba;
r->sector = lba * s->cluster_size;
@@ -794,7 +794,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
is_write = 1;
break;
case 0x35:
- DPRINTF("Synchronise cache (sector %d, count %d)\n", lba, len);
+ DPRINTF("Synchronise cache (sector %" PRId64 ", count %d)\n", lba, len);
bdrv_flush(s->bdrv);
break;
case 0x43:
@@ -896,7 +896,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
r->iov.iov_len = 16;
break;
case 0x2f:
- DPRINTF("Verify (sector %d, count %d)\n", lba, len);
+ DPRINTF("Verify (sector %" PRId64 ", count %d)\n", lba, len);
break;
default:
DPRINTF("Unknown SCSI command (%2.2x)\n", buf[0]);
diff --git a/hw/slavio_timer.c b/hw/slavio_timer.c
index 21924f871..69c9f3b67 100644
--- a/hw/slavio_timer.c
+++ b/hw/slavio_timer.c
@@ -197,8 +197,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
s->counthigh = val & (TIMER_MAX_COUNT64 >> 32);
s->reached = 0;
count = ((uint64_t)s->counthigh << 32) | s->count;
- DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,
- count);
+ DPRINTF("processor %d user timer set to %016" PRIx64 "\n",
+ s->slave_index, count);
if (s->timer)
ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
} else {
@@ -223,8 +223,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
s->count = val & TIMER_MAX_COUNT64;
s->reached = 0;
count = ((uint64_t)s->counthigh) << 32 | s->count;
- DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,
- count);
+ DPRINTF("processor %d user timer set to %016" PRIx64 "\n",
+ s->slave_index, count);
if (s->timer)
ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
} else
diff --git a/hw/sun4c_intctl.c b/hw/sun4c_intctl.c
index 7eb84596b..1273213b4 100644
--- a/hw/sun4c_intctl.c
+++ b/hw/sun4c_intctl.c
@@ -107,9 +107,9 @@ void sun4c_irq_info(Monitor *mon, void *opaque)
int64_t count;
monitor_printf(mon, "IRQ statistics:\n");
- count = s->irq_count[i];
+ count = s->irq_count;
if (count > 0)
- monitor_printf(mon, "%2d: %" PRId64 "\n", i, count);
+ monitor_printf(mon, " %" PRId64 "\n", count);
#endif
}
@@ -121,7 +121,6 @@ static void sun4c_check_interrupts(void *opaque)
uint32_t pil_pending;
unsigned int i;
- DPRINTF("pending %x disabled %x\n", pending, s->intregm_disabled);
pil_pending = 0;
if (s->pending && !(s->reg & 0x80000000)) {
for (i = 0; i < 8; i++) {
@@ -156,7 +155,7 @@ static void sun4c_set_irq(void *opaque, int irq, int level)
if (pil > 0) {
if (level) {
#ifdef DEBUG_IRQ_COUNT
- s->irq_count[pil]++;
+ s->irq_count++;
#endif
s->pending |= mask;
} else {
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index 28ab3a915..4c42ec0de 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -905,7 +905,7 @@ static int ohci_service_td(OHCIState *ohci, struct ohci_ed *ed)
flag_r = (td.flags & OHCI_TD_R) != 0;
#ifdef DEBUG_PACKET
- dprintf(" TD @ 0x%.8x %u bytes %s r=%d cbp=0x%.8x be=0x%.8x\n",
+ dprintf(" TD @ 0x%.8x %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x\n",
addr, len, str, flag_r, td.cbp, td.be);
if (len > 0 && dir != OHCI_TD_DIR_IN) {
@@ -1677,7 +1677,7 @@ static void usb_ohci_init(OHCIState *ohci, int num_ports, int devfn,
usb_bit_time = 1;
}
#endif
- dprintf("usb-ohci: usb_bit_time=%lli usb_frame_time=%lli\n",
+ dprintf("usb-ohci: usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64 "\n",
usb_frame_time, usb_bit_time);
}
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 7b74207b5..a61887b44 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -72,7 +72,7 @@
#ifdef DEBUG
#define dprintf printf
-const char *pid2str(int pid)
+static const char *pid2str(int pid)
{
switch (pid) {
case USB_TOKEN_SETUP: return "SETUP";
diff --git a/hw/vga.c b/hw/vga.c
index 403f6ff80..91a6852f2 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -799,7 +799,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
uint32_t write_mask, bit_mask, set_mask;
#ifdef DEBUG_VGA_MEM
- printf("vga: [0x%x] = 0x%02x\n", addr, val);
+ printf("vga: [0x" TARGET_FMT_plx "] = 0x%02x\n", addr, val);
#endif
/* convert to VGA memory offset */
memory_map_mode = (s->gr[6] >> 2) & 3;
@@ -832,7 +832,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
if (s->sr[2] & mask) {
s->vram_ptr[addr] = val;
#ifdef DEBUG_VGA_MEM
- printf("vga: chain4: [0x%x]\n", addr);
+ printf("vga: chain4: [0x" TARGET_FMT_plx "]\n", addr);
#endif
s->plane_updated |= mask; /* only used to detect font change */
cpu_physical_memory_set_dirty(s->vram_offset + addr);
@@ -845,7 +845,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
addr = ((addr & ~1) << 1) | plane;
s->vram_ptr[addr] = val;
#ifdef DEBUG_VGA_MEM
- printf("vga: odd/even: [0x%x]\n", addr);
+ printf("vga: odd/even: [0x" TARGET_FMT_plx "]\n", addr);
#endif
s->plane_updated |= mask; /* only used to detect font change */
cpu_physical_memory_set_dirty(s->vram_offset + addr);
@@ -919,10 +919,10 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
(((uint32_t *)s->vram_ptr)[addr] & ~write_mask) |
(val & write_mask);
#ifdef DEBUG_VGA_MEM
- printf("vga: latch: [0x%x] mask=0x%08x val=0x%08x\n",
- addr * 4, write_mask, val);
+ printf("vga: latch: [0x" TARGET_FMT_plx "] mask=0x%08x val=0x%08x\n",
+ addr * 4, write_mask, val);
#endif
- cpu_physical_memory_set_dirty(s->vram_offset + (addr << 2));
+ cpu_physical_memory_set_dirty(s->vram_offset + (addr << 2));
}
}