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* VFP register ordering (Paul Brook)bellard2005-04-072-16/+26
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1355 c046a42c-6fe2-441c-8c8c-71466251a162
* removed extern inline (Paul Brook)bellard2005-03-201-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1340 c046a42c-6fe2-441c-8c8c-71466251a162
* soft float supportbellard2005-03-133-145/+98
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1337 c046a42c-6fe2-441c-8c8c-71466251a162
* use the generic soft float codebellard2005-03-1315-5011/+84
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1333 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM VFP support (Paul Brook)bellard2005-02-225-13/+1096
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* initial user mmu supportbellard2005-02-073-2/+31
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* endianness fixesbellard2005-02-073-2/+25
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* CF generator for constant operandsbellard2005-02-072-1/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1267 c046a42c-6fe2-441c-8c8c-71466251a162
* SBCS fix (Paul Brook)bellard2005-02-021-2/+2
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* armv5te support (Paul Brook)bellard2005-01-315-25/+875
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1258 c046a42c-6fe2-441c-8c8c-71466251a162
* 64 bit target supportbellard2005-01-031-5/+5
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* removed warningsbellard2005-01-032-2/+2
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* more complete ARM shift fixbellard2004-12-082-7/+70
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1168 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM shift fix (Paul Brook)bellard2004-12-082-0/+18
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* correct handling of saved host registersbellard2004-10-121-0/+8
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1122 c046a42c-6fe2-441c-8c8c-71466251a162
* monitor fixesbellard2004-10-092-7/+7
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* cpu_single_env initbellard2004-06-221-0/+1
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* arm load/store half word fix (Ulrich Hecht)bellard2004-05-051-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@785 c046a42c-6fe2-441c-8c8c-71466251a162
* precise self modifying code supportbellard2004-04-251-0/+7
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* more log itemsbellard2004-03-211-6/+7
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* zero offset optimisationbellard2004-02-221-2/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162
* suppressed dummy FPU opsbellard2004-02-161-60/+0
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* added arm nwfpe support (initial patch by Ulrich Hecht)bellard2004-02-1618-0/+7573
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* added TARGET_LONG_BITSbellard2004-01-241-0/+2
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* added cpu_get_phys_page_debug()bellard2004-01-241-0/+5
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* use generic GenOpFuncbellard2004-01-051-5/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@543 c046a42c-6fe2-441c-8c8c-71466251a162
* imull fix (suggested by Robert J. Harley)bellard2003-11-301-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@478 c046a42c-6fe2-441c-8c8c-71466251a162
* 64-bit multiplication fix (Ulrich Hecht)bellard2003-11-112-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@446 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM half word load/store fix (Ulrich Hecht)bellard2003-11-031-2/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@438 c046a42c-6fe2-441c-8c8c-71466251a162
* new directory structurebellard2003-09-305-0/+1727
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@385 c046a42c-6fe2-441c-8c8c-71466251a162