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path: root/target-mips/exec.h
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* qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori2009-04-241-2/+8
* target-mips: rename helpers from do_ to helper_aurel322009-03-081-2/+0
* Fix remaining compiler warnings for mips targets.ths2008-12-201-15/+0
* Common cpu_loop_exit prototypeaurel322008-11-301-1/+0
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-111-1/+4
* Move the active FPU registers into env again, and use more TCG registersths2008-09-181-1/+1
* MIPS: remove empty cpu_mips_irqctrl_init()aurel322008-09-141-1/+0
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-3/+0
* Use plain standard inline.ths2008-07-231-4/+4
* Use temporary registers for the MIPS FPU emulation.ths2008-07-091-23/+0
* Remove remaining uses of T0 in the MIPS target.ths2008-06-241-6/+0
* T1 is now dead.ths2008-06-241-2/+0
* Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths2008-06-231-1/+0
* Delete obsolete prototypes.ths2008-06-201-21/+0
* Switch the standard multiplication instructions to TCG.ths2008-06-121-2/+0
* TCGify a few more instructions.ths2008-06-121-1/+0
* Call most FP helpers without deroute through op.cths2008-06-111-73/+0
* Move FP TNs to cpu env.ths2008-06-111-18/+18
* Switch remaining CP0 instructions to TCG or helper functions.ths2008-06-091-34/+1
* Switch most MIPS logical and arithmetic instructions to TCG.ths2008-05-181-2/+0
* Delete redundant prototype.ths2008-05-071-2/+0
* Use TCG for MIPS GPR moves.ths2008-05-061-2/+2
* Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths2008-05-041-4/+2
* Fix typo which broke MIPS32R2 64-bit FPU support.ths2008-01-091-1/+1
* MIPS COP1X (and related) instructions, by Richard Sandiford.ths2007-12-301-2/+16
* Support for VR5432, and some of its special instructions. Original patchths2007-12-251-0/+14
* Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths2007-11-091-6/+0
* Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths2007-11-081-3/+3
* Implement missing MIPS supervisor mode bits.ths2007-10-281-8/+4
* Add sharable clz/clo inline functions and use them for the mips target.ths2007-10-271-0/+2
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-1/+1
* Use always_inline in the MIPS support where applicable.ths2007-10-091-4/+4
* Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths2007-10-091-30/+0
* Code provision for n32/n64 mips userland emulation. Not functional yet.ths2007-09-301-5/+5
* Supervisor mode implementation, by Aurelien Jarno.ths2007-09-291-4/+9
* hflags computation cleanup, by Aurelien Jarno.ths2007-09-261-1/+25
* Timer start/stop implementation, by Aurelien Jarno.ths2007-09-251-0/+2
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-2/+2
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-19/+20
* Clean up of some target specifics in exec.c/cpu-exec.c.ths2007-06-031-8/+19
* More MIPS 64-bit FPU support.ths2007-05-191-46/+50
* - Move FPU exception handling into helper functions, since they are big.ths2007-05-181-0/+71
* More generic 64 bit multiplication support, by Aurelien Jarno.ths2007-05-161-2/+0
* MIPS TLB style selection at runtime, by Herve Poussineau.ths2007-05-131-5/+1
* MIPS 64-bit FPU support, plus some collateral bugfixes in theths2007-05-071-0/+6
* Kill broken host register definitions, thanks to Paul Brook and Herveths2007-04-291-11/+4
* Fix qemu SIGFPE caused by division-by-zero due to underflow.ths2007-04-151-1/+6
* Actually enable 64bit configuration.ths2007-04-011-4/+4
* Malta CBUS UART support.ths2007-03-311-1/+1
* Fix enough FPU/R2 support to get 24Kf going.ths2007-03-231-0/+1