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* Update FSF address in GPL/LGPL boilerplateaurel322009-01-044-4/+4
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-2/+2
* A first attempt on supporting snapshots for the MIPS target.ths2008-12-201-0/+291
* Fix remaining compiler warnings for mips targets.ths2008-12-204-22/+22
* Remove unnecessary trailing newlinesblueswir12008-12-131-2/+0
* MIPS: remove a few warningsaurel322008-12-071-4/+4
* Common cpu_loop_exit prototypeaurel322008-11-301-1/+0
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+8
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
* TCG variable type checking.pbrook2008-11-173-1225/+1212
* target-mips: avoid tcg internal error in mfc0/dmfc0aurel322008-11-151-8/+11
* Revert commits 5685 to 5688 committed by mistakeaurel322008-11-111-0/+4
* Don't stop translation for mtc0 compareaurel322008-11-111-4/+0
* target-mips: gen_compute_branch1()aurel322008-11-111-81/+41
* target-mips: optimize movc*()aurel322008-11-111-48/+33
* target-mips: optimize gen_farith()aurel322008-11-111-12/+12
* target-mips: optimize gen_muldiv()aurel322008-11-111-115/+47
* target-mips: optimize gen_arith()/gen_arith_imm()aurel322008-11-111-46/+32
* target-mips: convert bit shuffle ops to TCGaurel322008-11-113-76/+56
* target-mips: convert bitfield ops to TCGaurel322008-11-113-46/+41
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-113-16/+13
* target-mips: optimize gen_op_addr_add() (1/2)aurel322008-11-111-10/+7
* target-mips: optimize gen_save_pc()aurel322008-11-111-5/+1
* target-mips: fix mft* helpers/callaurel322008-11-113-34/+34
* target-mips: fix temporary variable freeing in op_ldst_##insn()aurel322008-11-111-1/+1
* target-mips: use the new rotr/rotri instructionsaurel322008-11-041-43/+5
* Show size for unassigned accesses (Robert Reif)blueswir12008-10-062-2/+2
* Use concet TCG instructions in the MIPS target.ths2008-09-221-24/+4
* Fix Xcontext fill, by Here Poussineau.ths2008-09-211-1/+1
* Add concat_i32_i64 op.pbrook2008-09-211-17/+6
* Use TCG registers for most CPU register accesses.ths2008-09-181-17/+52
* Move the active FPU registers into env again, and use more TCG registersths2008-09-186-314/+330
* MIPS: Fix tlbwi/tlbwraurel322008-09-141-3/+9
* MIPS: remove empty cpu_mips_irqctrl_init()aurel322008-09-141-1/+0
* target-mips: fix warningaurel322008-09-141-1/+1
* TCG fixes for target-mipsaurel322008-09-051-26/+27
* Build fix for gcc-3.3.ths2008-09-021-0/+4
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-3/+0
* MIPS: don't free TCG temporary variable twiceaurel322008-08-231-2/+0
* Delete unused variable.ths2008-08-011-1/+0
* Use plain standard inline.ths2008-07-232-11/+11
* Less hardcoding of TARGET_USER_ONLY.ths2008-07-236-390/+287
* A bunch of minor code improvements in the MIPS target.ths2008-07-212-21/+10
* Fix logging output for MIPS HI, LO registers, by Stefan Weil.ths2008-07-211-1/+2
* Fix compiler warning, by Stefan Weil.ths2008-07-201-1/+1
* Simplify conditional FP moves.ths2008-07-201-10/+5
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-7/+5
* Use temporary registers for the MIPS FPU emulation.ths2008-07-095-984/+1849