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* Update FSF address in GPL/LGPL boilerplateaurel322009-01-044-4/+4
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-2/+2
| | | | | | | | | Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
* A first attempt on supporting snapshots for the MIPS target.ths2008-12-201-0/+291
| | | | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6112 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix remaining compiler warnings for mips targets.ths2008-12-204-22/+22
| | | | | | | Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove unnecessary trailing newlinesblueswir12008-12-131-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS: remove a few warningsaurel322008-12-071-4/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5944 c046a42c-6fe2-441c-8c8c-71466251a162
* Common cpu_loop_exit prototypeaurel322008-11-301-1/+0
| | | | | | | | | | | All archs use the same cpu_loop_exit, so move the prototype in a common header. i386 was carrying a __hidden attribute, but that was empty for this arch anyway. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
| | | | | | | | | | | | | This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the code and also fixing a use after release issue in cpu_break/watchpoint_remove_all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
| | | | | | | | | | | | | | | | | | | | | This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the succeeding enhancements this series comes with. First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching to dynamically allocated data structures that are kept in linked lists. This also allows to return a stable reference to the related objects, required for later introduced x86 debug register support. Breakpoints and watchpoints are stored with their full information set and an additional flag field that makes them easily extensible for use beyond pure guest debugging. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+8
| | | | | | | | | | | | | | | This patch refactors the way the CPU state is handled that is associated with a TB. The basic motivation is to move more arch specific code out of generic files. Specifically the long #ifdef clutter in tb_find_fast() has to be overcome in order to avoid duplicating it for the gdb watchpoint fixes (patch "Restore pc on watchpoint hits"). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
| | | | | | | | | | | as macros should be avoided when possible. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG variable type checking.pbrook2008-11-173-1225/+1212
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: avoid tcg internal error in mfc0/dmfc0aurel322008-11-151-8/+11
| | | | | | | | | | | Set t0 to 0 for unimplemented mfc0/dmfc0 instructions. This fixes a tcg internal error while booting mips linux. Noticed by Julia Longtin. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5723 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert commits 5685 to 5688 committed by mistakeaurel322008-11-111-0/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5691 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't stop translation for mtc0 compareaurel322008-11-111-4/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5686 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: gen_compute_branch1()aurel322008-11-111-81/+41
| | | | | | | | | | | | | | Optimize code generation in gen_compute_branch1(): - Directly use I32 variables instead of converting values from _tl to _i32 and back to _tl. - Write the result directly to bcond instead of passing by a local variable. - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5684 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize movc*()aurel322008-11-111-48/+33
| | | | | | | | | | | | Optimize code generation in gen_movc*(): - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. - Avoid using temporary variables to transfer values. - Access fpu_fcr31 directly in gen_movcf_ps(). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5683 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_farith()aurel322008-11-111-12/+12
| | | | | | | | | | Optimize code generation in gen_farith(): - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5682 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_muldiv()aurel322008-11-111-115/+47
| | | | | | | | | | | | Optimize code generation in gen_muldiv(): - Don't do sign extension when the value is already guaranteed to be sign extended (otherwise, results are marked as UNPREDICTABLE). - Access the LO, HI registers directly instead of writting them through a temporary variable. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5681 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_arith()/gen_arith_imm()aurel322008-11-111-46/+32
| | | | | | | | | | | | | | Optimize code generation in gen_arith()/gen_arith_imm(): - Don't do sign extension when the value is already guaranteed to be sign extended (otherwise, results are marked as UNPREDICTABLE). - When the value is sign extended, compare the value to 0 instead of testing bit 31/63. - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5680 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: convert bit shuffle ops to TCGaurel322008-11-113-76/+56
| | | | | | | | | | | | | | Bit shuffle operations can be written with very few TCG instructions (between 5 and 8), so it is worth converting them to TCG. This code also move all bit shuffle generation code to a separate function in order to have a cleaner exception code path, that is it doesn't store back the TCG register to the target register after the exception, as the TCG register doesn't exist anymore. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: convert bitfield ops to TCGaurel322008-11-113-46/+41
| | | | | | | | | Bitfield operations can be written with very few TCG instructions (between 2 and 5), so it is worth converting them to TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-113-16/+13
| | | | | | | | | Instead of dynamically generating different code depending on the UX flag, add a new flag in ctx->flags to generate different code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_op_addr_add() (1/2)aurel322008-11-111-10/+7
| | | | | | | | | The user mode can be tested at translation time using ctx->hflags. This simplifies gen_op_addr_add(). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5676 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_save_pc()aurel322008-11-111-5/+1
| | | | | | | | We obviously don't need to use a temporary variable to write PC. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5675 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix mft* helpers/callaurel322008-11-113-34/+34
| | | | | | | | | | | | This patch attempts to fix mft* helpers and the associated TCG calls. mft* helpers do not take a register in argument, however: - some helpers are called with an argument while they do not take one. - some helpers are declared with an argument they don't use. Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix temporary variable freeing in op_ldst_##insn()aurel322008-11-111-1/+1
| | | | | | | | | | Move tcg_temp_free() out of the conditional part to make sure the TCG temporary variable is freed in all cases. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5673 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: use the new rotr/rotri instructionsaurel322008-11-041-43/+5
| | | | | | | Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5622 c046a42c-6fe2-441c-8c8c-71466251a162
* Show size for unassigned accesses (Robert Reif)blueswir12008-10-062-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
* Use concet TCG instructions in the MIPS target.ths2008-09-221-24/+4
| | | | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5303 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix Xcontext fill, by Here Poussineau.ths2008-09-211-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5284 c046a42c-6fe2-441c-8c8c-71466251a162
* Add concat_i32_i64 op.pbrook2008-09-211-17/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
* Use TCG registers for most CPU register accesses.ths2008-09-181-17/+52
| | | | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5253 c046a42c-6fe2-441c-8c8c-71466251a162
* Move the active FPU registers into env again, and use more TCG registersths2008-09-186-314/+330
| | | | | | | | | to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS: Fix tlbwi/tlbwraurel322008-09-141-3/+9
| | | | | | | | | | | | | | In CP0 Index register, bit 31 means 'Probe Failure', while lowest bits contain the TLB index. In tlbwi and tlbwr instructions, this Probe Failure bit must be ignored when reading the TLB index. Attached patch fixes it. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5215 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS: remove empty cpu_mips_irqctrl_init()aurel322008-09-141-1/+0
| | | | | | | | | cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty. Attached patch removes it, and its callers. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5214 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix warningaurel322008-09-141-1/+1
| | | | | | | | | Attached patch fixes a warning in cpu_mips_find_by_name(). 'name' is a string, so it should be declared as char*, not unsigned char*. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5213 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG fixes for target-mipsaurel322008-09-051-26/+27
| | | | | | | | | | This patch fixes TCG errors reported on the MIPS target when TCG_DEBUG is enabled. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5164 c046a42c-6fe2-441c-8c8c-71466251a162
* Build fix for gcc-3.3.ths2008-09-021-0/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5139 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-3/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS: don't free TCG temporary variable twiceaurel322008-08-231-2/+0
| | | | | | | | | | | In gen_dmtc0 function, TCG temporary variable t0 is freed at the end of the function. Variable is freed again in the gen_dmtc0 caller. I removed the free in gen_dmtc0, to do like in gen_dmfc0, gen_mfc0, gen_mtc0. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5075 c046a42c-6fe2-441c-8c8c-71466251a162
* Delete unused variable.ths2008-08-011-1/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4981 c046a42c-6fe2-441c-8c8c-71466251a162
* Use plain standard inline.ths2008-07-232-11/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
* Less hardcoding of TARGET_USER_ONLY.ths2008-07-236-390/+287
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
* A bunch of minor code improvements in the MIPS target.ths2008-07-212-21/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4921 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix logging output for MIPS HI, LO registers, by Stefan Weil.ths2008-07-211-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4916 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix compiler warning, by Stefan Weil.ths2008-07-201-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4915 c046a42c-6fe2-441c-8c8c-71466251a162
* Simplify conditional FP moves.ths2008-07-201-10/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4913 c046a42c-6fe2-441c-8c8c-71466251a162
* Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths2008-07-181-7/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
* Use temporary registers for the MIPS FPU emulation.ths2008-07-095-984/+1849
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162