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* target-mips: fix DINSU instructionqemu-kvm-0.12.4-gentoo-1Aurelien Jarno2010-07-201-1/+1
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix ROTR and DROTR by zeroAurelien Jarno2010-02-231-0/+4
| | | | | | | Backported from HEAD (cc3f20fee2c9bea3793bf873c531ae6baf68df3a) Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix CpU exception for coprocessor 0Nathan Froyd2010-02-231-1/+1
| | | | | | | | | When we signal a CpU exception for coprocessor 0, we should indicate that it's for coprocessor 0 instead of coprocessor 1. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> (cherry picked from commit 13f160cebd0778113ba8d251aea297286b1666cb)
* target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno2010-02-063-8/+22
| | | | | | | | In helper.c AREG0 may not correspond do env, so it's not possible to call cpu_loop_exit() here. Call it from op_helper.c instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> (cherry picked from commit c36bbb28ad62b4b1f494df0b199432d8c79876db)
* target-mips: fix user-mode emulation startupNathan Froyd2009-12-132-8/+8
| | | | | | | | | | | | | | | | Running programs with the MIPS user-mode emulator fails during dynamic loading, as floating-point instructions are not enabled in in env->hflags. Move the code for doing so from fpu_init to cpu_reset so the MIPS_HFLAG_{FPU,F64} setting doesn't get clobbered by cpu_reset setting env->hflags to MIPS_HFLAG_UM. The same end can be achieved by swapping the ordering of fpu_init and cpu_reset in cpu_mips_init, but it seemed better to consolidate the CONFIG_USER_ONLY code into a single location. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> (cherry picked from commit 91a759352623e4a3da969fa66626cc99241e9da2)
* target-mips: use physical address in lladdrAurelien Jarno2009-11-303-28/+61
| | | | | | | | Currently the ll/sc instructions use the virtual address in both user and system mode. Use the physical address insteead in system mode. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: add a function to do virtual -> physical translationsAurelien Jarno2009-11-302-0/+25
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: split code raising MMU exception in a separate functionAurelien Jarno2009-11-301-46/+53
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: factorize load/store code in op_helper.cAurelien Jarno2009-11-301-152/+100
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix physical address type in MMU functionsAurelien Jarno2009-11-222-11/+11
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno2009-11-225-4/+49
| | | | | | | | Depending on the CPU, CP0_LLAddr is either read-only or read-write, and the returned value can be shifted by a variable amount of bits. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
* target-mips: rename CP0_LLAddr into lladdrAurelien Jarno2009-11-224-16/+16
| | | | | | | | The variable CP0_LLAddr represent the full lladdr, not the actual register value, which is only part of this value and depends on the CPU. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix indentationAurelien Jarno2009-11-142-3/+3
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* mips: fix cpu_reset memory leakBlue Swirl2009-11-143-56/+54
| | | | | | | | | Remove cpu_mips_register() - move mmu_init(), fpu_init() and mvp_init() into cpu_mips_init() - move the other parts in cpu_mips_init() Reported-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-015-27/+28
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-015-28/+27
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* target-mips: make sure constants are in the second argumentAurelien Jarno2009-09-301-7/+7
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* mips: Fix spelling in commentStefan Weil2009-09-301-2/+2
| | | | | | | | | inofficial -> unofficial Thanks to Blue Swirl. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: unmatched brackets in if 0Michael S. Tsirkin2009-09-301-1/+0
| | | | | | | Fix unmatched braket in commented out code Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: log instructions start in TCG codeAurelien Jarno2009-09-281-0/+4
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: remove MAX_OP_PER_INSTR workaroundAurelien Jarno2009-09-231-2/+1
| | | | | | | Now that MAX_OP_PER_INSTR has been increased to a safer value, removed the target-mips specific workaround. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Add 'static' to please SparseBlue Swirl2009-09-211-1/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: fix single-steppingNathan Froyd2009-09-141-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | Single-stepping branches on MIPS didn't work right, because the generation of EXCP_DEBUG happened after the generation of the code to exit the current TB. That is, given the code: bne v0,v1,target nop ... target: addu v0,v0,v1 1: when you single-stepped through the NOP, execution wouldn't actually halt until you reached the label `1'. This patch corrects that and also changes single-stepping so that a branch and its delay slot are executed as one instruction for the purposes of single-stepping. This behavior is comparable to what other MIPS tools (e.g. MIPSsim with MDI) do. GDB avoids placing breakpoints in branch delay slots, so this change doesn't break anything on the GDB side. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
| | | | | | | | | | | | | | | Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: fix conditional moves off fp condition codesNathan Froyd2009-08-251-5/+5
| | | | | | | | | | | | | | Conditional moves off fp condition codes were using the result of get_fp_bit to isolate and test the relevant condition code. However, get_fp_bit returns the bit number of the condition code, not a bitmask. (Compare the use of get_fp_bit in gen_compute_branch1, for instance.) Fixed by shifting a bitmask into place using the result of get_fp_bit in the relevant functions (gen_mov{ci,cf_s,cf_d,cf_ps}). Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd2009-08-241-0/+1
| | | | | | | | | | | | | | | handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela2009-07-271-1/+1
| | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela2009-07-271-1/+1
| | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-164-8/+4
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: remove useless code in gen_st_cond()Aurelien Jarno2009-07-121-1/+0
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix MIPS SCPaul Brook2009-07-121-2/+2
| | | | | | | Fix botched merge of op_ldst_sc calls to match actual implementation. Thanks to Aurelien Jarno for diagnosing this. Signed-off-by: Paul Brook <paul@codesourcery.com>
* MIPS atomic instructionsPaul Brook2009-07-092-24/+64
| | | | | | Implement MIPS ll/sc instructions using atomic compare+exchange. Signed-off-by: Paul Brook <paul@codesourcery.com>
* MIPS usermode TLS registerPaul Brook2009-07-091-0/+5
| | | | | | Implement cpu_set_tls for MIPS. Signed-off-by: Paul Brook <paul@codesourcery.com>
* target-mips: fix MADD and MSUB/MSUBU instructionsNathan Froyd2009-07-031-3/+3
| | | | | | | | | MADD was not correctly writing to HI. MSUB/MSUBU are specified as `HI||LO - product', not `product - HI||LO'. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix a warning: uint_fast8_t is not 8 bits on OpenBSD/Sparc64Blue Swirl2009-06-131-2/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Convert machine registration to use module init functionsAnthony Liguori2009-05-211-9/+0
| | | | | | This cleans up quite a lot of #ifdefs, extern variables, and other ugliness. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Hardware convenience libraryPaul Brook2009-05-191-3/+0
| | | | | | | | | | | | | | The only target dependency for most hardware is sizeof(target_phys_addr_t). Build these files into a convenience library, and use that instead of building for every target. Remove and poison various target specific macros to avoid bogus target dependencies creeping back in. Big/Little endian is not handled because devices should not know or care about this to start with. Signed-off-by: Paul Brook <paul@codesourcery.com>
* Include assert.h from qemu-common.hPaul Brook2009-05-131-1/+0
| | | | | | | Include assert.h from qemu-common.h and remove other direct uses. cpu-all.h still need to include it because of the dyngen-exec.h hacks Signed-off-by: Paul Brook <paul@codesourcery.com>
* Replace gcc variadic macro extension with C99 versionBlue Swirl2009-05-131-3/+3
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-mips: proper sign extension for 'SUBU rd, zero, rt'Aurelien Jarno2009-05-041-0/+1
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: fix comments about SUB/DSUBAurelien Jarno2009-05-041-2/+2
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori2009-04-241-0/+1
| | | | | | | | Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
* qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori2009-04-241-2/+8
| | | | | | | | | | Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
* Enable access to SYNCI_Step register in usermode emulation.pbrook2009-04-201-0/+2
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7191 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert "target-mips: fix call to check_*() functions"aurel322009-04-171-24/+12
| | | | | | This reverts commit r7127, r7132 is a better fix for that. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7133 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: simplify exception generationaurel322009-04-171-4/+0
| | | | | | | | | There is no need to exit the tb after a call to helper_raise_exception as it already calls cpu_loop_exit(). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7132 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix revision r7126aurel322009-04-161-1/+1
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7128 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: fix call to check_*() functionsaurel322009-04-161-12/+24
| | | | | | | | | | check_*() functions may in fine call generate_exception(), which ends by a call to tcg_gen_exit_tb(). As a consequence, we have to make sure that no TCG temp variables are crossing a check_*() function. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7127 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_flt3_ldst()aurel322009-04-161-4/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7126 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_flt_ldst()aurel322009-04-161-4/+2
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7125 c046a42c-6fe2-441c-8c8c-71466251a162