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path: root/target-sparc/exec.h
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* sparc64: trap handling correctionsIgor Kovalenko2009-07-121-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote: > On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote: >> Good trap handling is required to process interrupts. >>  This patch fixes the following: >> >>  - sparc64 has no wim register >>  - sparc64 has no psret register, use IE bit of pstate >>   extract IE checking code to cpu_interrupts_enabled >>  - alternate globals are not available if cpu has GL feature >>   in this case bit AG of pstate is constant zero >>  - write to pstate must actually write pstate >>   even if cpu has GL feature >> >>  Also timer interrupt is handled using do_interrupt. > > A bit too much for one patch. Please also remove the code instead of > commenting out. I now excluded timer interrupt related part. To my mind other changes are essentially tied together. > PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32. Fixed, please find attached the updated version. -- Kind regards, Igor V. Kovalenko
* qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori2009-04-241-1/+8
| | | | | | | | | | Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
* Common cpu_loop_exit prototypeaurel322008-11-301-3/+0
| | | | | | | | | | | All archs use the same cpu_loop_exit, so move the prototype in a common header. i386 was carrying a __hidden attribute, but that was empty for this arch anyway. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix missing prototype warnings by moving declarationsblueswir12008-10-031-11/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162
* Move signal handler prototype back to cpu.hblueswir12008-09-201-1/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir12008-09-101-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove memcpy32() prototype leftover from r5109blueswir12008-08-301-1/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix Sparc64 boot on i386 host:blueswir12008-08-291-0/+15
| | | | | | | | | | | - move do_interrupt() back to op_helper.c - move non-helper prototypes from helper.h to exec.h - move some prototypes from cpu.h to exec.h - do not export either set_cwp() or cpu_set_cwp() from op_helper.c, but instead provide inline functions git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)blueswir12008-05-291-5/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
* Move non-op functions from op_helper.c to helper.c and vice versa.blueswir12008-05-271-1/+1
| | | | | | | Rearrange interrupt handling to match other targets. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
* Move prototype back to avoid a compiler warningblueswir12008-05-121-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4443 c046a42c-6fe2-441c-8c8c-71466251a162
* suppressed fixed registersbellard2008-05-101-29/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix compiler warningsblueswir12008-05-101-14/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
* CPU feature selection supportblueswir12008-05-091-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
* Move #include to speed up compilationblueswir12008-05-091-5/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
* Complete the TCG conversionblueswir12008-05-041-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove leftover definitionsblueswir12008-03-211-12/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4098 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert exception ops to TCGblueswir12008-03-061-1/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert float helpers to TCG, fix fabsq in the processblueswir12008-03-041-32/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
* Modify Sparc32/64 to use TCGblueswir12008-02-241-16/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix compilation and warnings on PPC hostblueswir12007-11-281-1/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
* 128-bit float support for user modeblueswir12007-11-251-0/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-1/+1
| | | | | | | | | | | | | | allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructionsblueswir12007-09-301-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
* Rework ASI instructions (Aurelien Jarno)blueswir12007-09-211-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean up of some target specifics in exec.c/cpu-exec.c.ths2007-06-031-0/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
* Full implementation of IEEE exceptions (Aurelien Jarno)blueswir12007-04-061-0/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
* SPARC host fixes, by Ben Taylor.ths2007-03-191-18/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
* Sparc arm/mips/sparc register patch, by Martin Bochnig.ths2007-02-021-0/+22
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
* moved common softmmu code to common header (Paul Brook)bellard2005-10-301-65/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
* restore regwptr (Blue Swirl)bellard2005-10-301-0/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1576 c046a42c-6fe2-441c-8c8c-71466251a162
* sparc64 fixes (Blue Swirl)bellard2005-07-231-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
* correct split between helper.c and op_helper.cbellard2005-07-041-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1506 c046a42c-6fe2-441c-8c8c-71466251a162
* sparc64 marge (Blue Swirl)bellard2005-07-021-2/+30
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
* sparc fixesbellard2005-02-131-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1291 c046a42c-6fe2-441c-8c8c-71466251a162
* clean up - commentsbellard2005-02-071-3/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1271 c046a42c-6fe2-441c-8c8c-71466251a162
* initial sparc64 support - sparc fixes (Blue Swirl)bellard2005-01-301-5/+13
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1251 c046a42c-6fe2-441c-8c8c-71466251a162
* SPARC mergebellard2004-12-191-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1179 c046a42c-6fe2-441c-8c8c-71466251a162
* correct handling of saved host registersbellard2004-10-121-0/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1122 c046a42c-6fe2-441c-8c8c-71466251a162
* sparc fixesbellard2004-10-101-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1117 c046a42c-6fe2-441c-8c8c-71466251a162
* sparc merge (Blue Swirl)bellard2004-10-041-1/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1098 c046a42c-6fe2-441c-8c8c-71466251a162
* full system SPARC emulation (Blue Swirl)bellard2004-09-301-0/+90
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1083 c046a42c-6fe2-441c-8c8c-71466251a162
* flush insn supportbellard2004-04-251-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@743 c046a42c-6fe2-441c-8c8c-71466251a162
* sparc emulation target (thanx to Thomas M. Ogrisegg)bellard2003-09-301-0/+16
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@386 c046a42c-6fe2-441c-8c8c-71466251a162