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* Update FSF address in GPL/LGPL boilerplateaurel322009-01-042-2/+2
* Add SuperSPARC MMU breakpoint registers (Robert Reif)blueswir12008-12-232-1/+45
* Better SuperSPARC emulation (Robert Reif)blueswir12008-12-232-23/+28
* Implement tick interrupt disable bitsblueswir12008-12-231-1/+2
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-2/+2
* Remove unnecessary trailing newlinesblueswir12008-12-132-3/+0
* Add missing "static"blueswir12008-12-111-1/+1
* Common cpu_loop_exit prototypeaurel322008-11-301-3/+0
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+16
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
* TCG variable type checking.pbrook2008-11-173-632/+627
* Use TCG not opblueswir12008-11-091-14/+12
* Use andc, orc, nor and nandblueswir12008-11-091-52/+36
* Fix TCGv size mismatchesblueswir12008-11-011-19/+21
* Add static (spotted by sparse)blueswir12008-10-071-1/+1
* Fix error in fexpand (spotted by sparse)blueswir12008-10-071-4/+4
* Show size for unassigned accesses (Robert Reif)blueswir12008-10-062-14/+15
* Rearrange tick functionsblueswir12008-10-033-31/+31
* Fix missing prototype warnings by moving declarationsblueswir12008-10-032-11/+9
* Fix MXCC printf warning (based on patch by Robert Reif)blueswir12008-10-021-3/+3
* Add mmu tlb demap support (Igor Kovalenko)blueswir12008-09-271-1/+35
* Add a generic Niagara machineblueswir12008-09-262-2/+2
* Implement some UA2007 block ASIsblueswir12008-09-261-0/+6
* Implement UA2005 hypervisor trapsblueswir12008-09-263-18/+23
* Move also DEBUG_PCALL (see r5085)blueswir12008-09-262-1/+1
* Add software and timer interrupt supportblueswir12008-09-224-5/+49
* Fix arguments used in cas/casx, thanks to Igor Kovalenko for spottingblueswir12008-09-221-5/+5
* Use the new concat_tl_i64 op for std and stdablueswir12008-09-211-18/+6
* Use the new concat_i32_i64 op for std and stdablueswir12008-09-213-22/+20
* Move signal handler prototype back to cpu.hblueswir12008-09-202-1/+1
* Fix array subscript above array bounds errorblueswir12008-09-141-1/+1
* Fix mulscc with high bits set in either src1 or src2blueswir12008-09-131-2/+3
* Write zeros to high bits of y, based on patch by Vince Weaverblueswir12008-09-111-2/+4
* Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir12008-09-105-64/+39
* Partially convert float128 conversion ops to TCGblueswir12008-09-103-20/+19
* Convert basic 64 bit VIS ops to TCGblueswir12008-09-104-102/+65
* Convert basic 32 bit VIS ops to TCGblueswir12008-09-103-164/+48
* Convert basic float32 ops to TCGblueswir12008-09-103-190/+329
* Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir12008-09-095-31/+43
* Fix a typo in fpsub32blueswir12008-09-061-1/+1
* Convert most env fields to TCG registersblueswir12008-09-061-95/+91
* Silence gcc warning about constant overflowblueswir12008-09-062-3/+11
* Implement no-fault loadsblueswir12008-09-031-8/+36
* Fix sign extension problems with smul and umul (Vince Weaver)blueswir12008-09-021-4/+4
* Fix y register loads and storesblueswir12008-09-011-18/+16
* Remove memcpy32() prototype leftover from r5109blueswir12008-08-301-1/+0
* Fix FCC handling for Sparc64 target, initial patch by Vince Weaverblueswir12008-08-292-30/+28
* Fix Sparc64 boot on i386 host:blueswir12008-08-295-273/+280