From 03977906773ff9135a171d6a57da8620877f28ec Mon Sep 17 00:00:00 2001 From: Mikle Kolyada Date: Sun, 22 Mar 2020 11:50:43 +0300 Subject: sci-electronics/iverilog: amd64 stable wrt bug #713730 Package-Manager: Portage-2.3.89, Repoman-2.3.20 RepoMan-Options: --include-arches="amd64" Signed-off-by: Mikle Kolyada --- sci-electronics/iverilog/iverilog-10.3.ebuild | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sci-electronics/iverilog') diff --git a/sci-electronics/iverilog/iverilog-10.3.ebuild b/sci-electronics/iverilog/iverilog-10.3.ebuild index cb0a5a2dca56..abb406c6c94d 100644 --- a/sci-electronics/iverilog/iverilog-10.3.ebuild +++ b/sci-electronics/iverilog/iverilog-10.3.ebuild @@ -18,7 +18,7 @@ if [[ ${PV} == "9999" ]] ; then EGIT_REPO_URI="https://github.com/steveicarus/${PN}.git" else SRC_URI="https://github.com/steveicarus/${PN}/archive/v${GITHUB_PV}.tar.gz -> ${P}.tar.gz" - KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc ~x86" + KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc ~x86" S="${WORKDIR}/${PN}-${GITHUB_PV}" fi -- cgit v1.2.3-65-gdbad