sci-electronics@gentoo.org Gentoo Electronics Project GPL Cver is a Verilog HDL simulator that is released under the GNU General Public License. GPL Cver is a full 1995 P1364 Verilog standard HDL simulator. It also implements some of the 2001 P1364 standard features including all three PLI interfaces (tf_, acc_ and vpi_) as defined in the 2001 Language Reference Manual (LRM). gplcver