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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE pkgmetadata SYSTEM "https://www.gentoo.org/dtd/metadata.dtd">
<pkgmetadata>
  <herd>sci-electronics</herd>
  <longdescription>
  This program is a simple implementation of a Verilog simulator. VBS tries to
  implement all of the Verilog behavioral constructs that are synthesizable, but
  still allow complex test vectors for simulation.
  </longdescription>
</pkgmetadata>