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path: root/target-sh4/translate.c
Commit message (Expand)AuthorAgeFilesLines
* target-sh4: MMU: fix mem_idx computationAurelien Jarno2010-04-091-1/+1
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
* Include assert.h from qemu-common.hPaul Brook2009-05-131-1/+0
* qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori2009-04-241-0/+1
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-3/+2
* SH: Improve movca.l/ocbi emulation.edgar_igl2009-04-011-4/+42
* SH: Implement MOVCO.L and MOVLI.Laurel322009-03-021-1/+34
* SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel322009-02-071-0/+2
* targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0
* Log reset events (Jan Kiszka)aliguori2009-01-261-0/+5
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-1/+1
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-10/+7
* sh4: Add FMAC instruction supportaurel322009-01-141-0/+11
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* tcg_temp_local_new should take no parameteraurel322009-01-011-6/+6
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-2/+2
* target-sh4: make the initial value of SR easier to readaurel322008-12-131-1/+1
* target-sh4: don't disable FPU instructions in user modeaurel322008-12-131-1/+1
* target-sh4: disable debug codeaurel322008-12-131-1/+3
* target-sh4: add prefi, icbi, syncoaurel322008-12-131-0/+20
* target-sh4: add SH7785 as CPU optionaurel322008-12-131-1/+7
* target-sh4: check FD bit for FP instructionsaurel322008-12-101-6/+23
* SH4: kill a few warningsaurel322008-12-071-2/+2
* SH4: Implement FD bitaurel322008-12-071-4/+26
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
* target-sh4: fix 64-bit fmov to/from memoryaurel322008-11-221-29/+33
* target-sh4: fix fldi0/fldi1aurel322008-11-201-4/+2
* target-sh4: map FP registers as TCG variablesaurel322008-11-191-106/+43
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
* TCG variable type checking.pbrook2008-11-171-267/+271
* Fix undeclared symbol warnings from sparseblueswir12008-10-261-2/+2
* SH4: Implement MOVUA.Laurel322008-10-121-0/+11
* SH4: fix single-steppingaurel322008-10-121-0/+1
* SH4: Fix swap.baurel322008-10-121-1/+4
* Silence some warnings about no value returned from non-void functionblueswir12008-10-051-1/+1
* Add concat_i32_i64 op.pbrook2008-09-211-6/+3
* Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir12008-09-201-2/+2
* SH4: Privilege check for instructionsaurel322008-09-151-24/+43
* sh4: doesn't set the cpu_model_straurel322008-09-151-0/+1
* SH4: sleep instruction bug fixaurel322008-09-151-1/+1
* sh4: CPU versioning.aurel322008-09-021-0/+59
* SH4: fix a regression introduced in r5122aurel322008-09-021-1/+1
* SH4: Remove dyngen leftoversaurel322008-09-011-5/+0
* SH4: final conversion to TCGaurel322008-09-011-1/+7
* SH4: convert floating-point ops to TCGaurel322008-09-011-153/+249
* SH4: Remove most uses of cpu_T[0] and cpu_T[1]aurel322008-09-011-181/+427
* SH4: TCG optimisationsaurel322008-09-011-349/+236
* SH4: Convert remaining non-fp ops to TCGaurel322008-09-011-28/+109
* SH4: Convert shift functions to TCGaurel322008-08-301-3/+9