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authorDavid Michael <fedora.dm0@gmail.com>2021-05-03 08:56:19 -0400
committerMike Gilbert <floppym@gentoo.org>2021-05-05 16:05:25 -0400
commit9745b8f75443e0580b6f194b3100d91d5ebdb765 (patch)
treeba25e7d5db04374309c3598a913e99e4dfb70270 /eclass/meson.eclass
parentdev-python/brotlicffi: Enable python3.10 (diff)
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meson.eclass: include riscv bitness in cpu_family
This makes cpu_family identify RISC-V systems as either "riscv64" or "riscv32" to match the given tuple, or it will leave it as "riscv" when the tuple has an unknown cpu field. This fixes the expected values of cpu_family in meson projects: https://mesonbuild.com/Reference-tables.html#cpu-families Signed-off-by: David Michael <fedora.dm0@gmail.com> Signed-off-by: Mike Gilbert <floppym@gentoo.org>
Diffstat (limited to 'eclass/meson.eclass')
-rw-r--r--eclass/meson.eclass7
1 files changed, 6 insertions, 1 deletions
diff --git a/eclass/meson.eclass b/eclass/meson.eclass
index d0ce5adb3558..d87d61f44ae4 100644
--- a/eclass/meson.eclass
+++ b/eclass/meson.eclass
@@ -1,4 +1,4 @@
-# Copyright 2017-2020 Gentoo Authors
+# Copyright 2017-2021 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
# @ECLASS: meson.eclass
@@ -142,6 +142,11 @@ _meson_get_machine_info() {
case ${cpu_family} in
amd64) cpu_family=x86_64 ;;
arm64) cpu_family=aarch64 ;;
+ riscv)
+ case ${tuple} in
+ riscv32*) cpu_family=riscv32 ;;
+ riscv64*) cpu_family=riscv64 ;;
+ esac ;;
esac
# This may require adjustment based on CFLAGS